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march 2005 1 mic2584/2585 mic2584/2585 micrel ordering information part number output sequencing fast circuit breaker package standard pb-free threshold mic2584-xbts mic2584-xyts n/a x = j, 100mv 16-pin tssop x = k, 150mv * mic2585-1xbts mic2585-1xyts out2 follows out1 x = l, 200mv *24-pin tssop MIC2585-2XBTS mic2585-2xyts out1 follows out2 x = m, off * * contact micrel for availability. mic2584/mic2585 dual-channel hot swap controller/sequencer general description the mic2584 and mic2585 are dual-channel positive volt- age hot swap controllers designed to facilitate the safe insertion of boards into live system backplanes. the mic2584 and mic2585 are available in 16-pin and 24-pin tssop packages, respectively. using a few external discrete com- ponents and by controlling the gate drives of external n- channel mosfet devices, the mic2584/85 provides inrush current limiting and output voltage slew rate control in harsh, critical power supply environments. additionally, the mic2585 provides output turn-on sequencing and output tracking during turn-on and turn-off. in combination, the devices many features provide a simplified, robust solution for many network applications to meet the power sequencing and protection requirements of multiple-voltage logic systems. features 1.0v to 13.2v supply voltage operation surge voltage protection up to 20v current regulation limits inrush current regardless of load capacitance programmable inrush current limiting electronic circuit breaker dual-level overcurrent fault sensing eliminates false tripping fast response to short circuit conditions (< 1 s) two sequenced output mode selections (mic2585 only) ? 250mv supply tracking mode during turn-on/turn-off (mic2585 only) overvoltage and undervoltage output monitoring (overvoltage for mic2585 only) undervoltage lockout protection /fault status output power-on reset and power-good status output (power-good for mic2585 only) applications raid systems network servers base stations network switches hot-board insertion micrel, inc. ?2180 fortune drive ?san jose, ca 95131 ?usa ?tel + 1 (408) 944-0800 ?fax + 1 (408) 474-1000 ?http://www.mic rel.com
mic2584/2585 micrel mic2584/2585 2 march 2005 typical application *c5 0.047 f d2 r6 130k ? 1% r8 30.9k ? 1% r9 8.06k ? 1% r7 13k ? 1% r3 47k ? r4 22k ? r2 10 ? r5 22k ? v cc1 12v v cc2 3.3v gnd pcb edge connector **bzx84cxx backplane connector downstream controller(s) downstream control signals sense2 vcc2 r sense2 0.020 ? 12 34 12 sense1 vcc1 r sense1 0.006 ? 12 34 24 23 c3 0.01 f q2 si7892dp (powerpak so-8) c load1 330 f v out1 12v 6a v out2 3.3v 1.5a c load2 330 f c4 0.01 f q1 si7892dp (powerpak so-8) c7 0.033 f c6 0.02 f cpor cfilter gnd 3 22 5 6 7 20 18 19 17 16 15 11 trk 9 13 10 gate2 gate1 out2 dis2 dis1 fb2 fb1 /por pg2 pg1 out1 cdly 12 /fault 14 ov1 21 ov2 4 on 8 undervoltage (output1) = 10.5v undervoltage (output2) = 2.95v overvoltage (input1) = 13.2v overvoltage (input2) = 3.65v start-up delay = 2.5ms por delay = 10ms circuit breaker response time = 16ms *c5 (optional) is used to set the delay for v out2 with respect to v out1 v out2 delay = 9.5ms **d1 is bzx84c18 and d2 is bzx84c8v2 resistor tolerances are 5% unless specified otherwise. c2 0.47 f r11 120 ? r15 4.42k ? 1% r13 14.7k ? 1% r10 560 ? r12 105k ? 1% r14 10.7k ? 1% d1 r1 10 ? c1 0.47 f /fault signal mic2585-1 figure 1. typical application circuit
march 2005 3 mic2584/2585 mic2584/2585 micrel pin configuration 1 vcc2 sense2 gate2 out2 fb2 on cpor cfilter 16 vcc1 sense1 gate1 out1 fb1 /por /fault gnd 15 14 13 12 11 10 9 2 3 4 5 6 7 8 mic2584 16-pin tssop (ts) cdly gnd 13 12 cfilter /fault 14 11 1 vcc2 sense2 gate2 ov2 out2 dis2 fb2 on trk cpor 24 vcc1 sense1 gate1 ov1 out1 dis1 fb1 pg1 pg2 /por 23 22 21 20 19 18 17 16 15 2 3 4 5 6 7 8 9 10 mic2585 24-pin tssop (ts) pin description pin number pin number pin name pin function mic2584 mic2585 16 24 vcc1 positive supply (input), channel 1: this input is the main supply to the internal circuitry and must be in the range of 2.3v to 13.2v. the gate1 pin is held low by an internal undervoltage lockout circuit until v cc1 and v cc2 exceed their respective undervoltage lockout threshold of 2.165v and 0.8v. this input is protected up to 20v. 1 1 vcc2 positive supply (input), channel 2: the gate2 pin is held low by an internal undervoltage lockout circuit until v cc1 and v cc2 exceed their respective undervoltage lockout threshold of 2.165v and 0.8v. this input must be in the range of 1.0v to 13.2v and less than or equal to v cc1 . this input is protected up to 20v. 2, 15 2, 23 sense2, sense1 circuit breaker sense (inputs): a resistor between this pin and vcc1 and vcc2 sets the current limit threshold for each channel. whenever the voltage across either sense resistor exceeds the slow trip current limit threshold (v tripslow ), the gate voltage is adjusted to ensure a constant load current. if v tripslow (50mv) is exceeded for longer than time period t ocslow , then the circuit breaker is tripped and both gate outputs are immediately pulled low. if the voltage across either sense resistor exceeds the fast trip circuit breaker threshold, v tripfast , at any point due to fast, high amplitude power supply faults, then both gate outputs are immediately brought low without delay. to disable the circuit breaker for either channel, the sense and vcc pins can be tied together. the default v tripfast for either device is 100mv. other fast trip thresholds are available: 150mv, 200mv, or off (v tripfast disabled). please contact factory for availability of other options. 6 8 on enable (input): active high. the on pin, an input to a schmitt-triggered comparator used to enable/disable the controller, is compared to a 1.235v reference with 25mv of hysteresis. when a logic high is applied to the on pin (v on > 1.235v), a start-up sequence begins when the gate1 and gate2 pins begin ramping up towards their final operating voltage. when the on pin receives a logic low signal (v on < 1.21v), the gate pins are grounded and /fault remains high if both inputs are above their respective uvlo thresholds. the on pin must be low for at least 20 s in order to initiate a start-up sequence. additionally, toggling the on pin low to high resets the circuit breaker.
mic2584/2585 micrel mic2584/2585 4 march 2005 pin number pin number pin name pin function mic2584 mic2585 3, 14 3, 22 gate2, gate1 gate drive (outputs): connect each output to the gates of external n-channel mosfets. when on is asserted, a 14 a current source is activated and begins to charge the gate of the n-channel mosfet connected to this pin. an internal clamp ensures that no more than 10v is applied between the gate and source when vcc1 or vcc2 is above 5v. when the circuit breaker trips or when an input undervoltage lockout condition is detected, the gate1 and gate2 pins are immediately brought low. 9 13 gnd ground: tie to analog ground. 7 10 cpor power-on reset timer (input): a capacitor connected between this pin and ground sets the start-up delay (t start ) and the power-on reset interval (t por ). once the lagging supply rises above its uvlo threshold and on asserts, the capacitor connected to cpor begins to charge. when the voltage at cpor crosses 0.3v, the start-up threshold (v start ), a start cycle is initiated as the gate outputs begin to ramp while capacitor c por is immediately discharged to ground. when the voltage at the lagging fb pin rises above its threshold (v fb ), capacitor cpor begins to charge again. when the voltage at cpor rises above the power-on reset delay threshold (v por ) of 1.235v, the timer resets by pulling cpor to ground and /por is deasserted. if c por = 0, then t start defaults to 20 s. 8 11 cfilter current limit response timer (input): a capacitor connected to this pin defines the period of time, t ocslow , in which an overcurrent event must last to signal a fault condition and trip the circuit breaker. when an overcurrent condition occurs, a 2.5 a current source begins to charge this capacitor. if the voltage at this pin reaches 1.235v, the circuit breaker is tripped, both gate pins immediately shut off, and /fault is asserted. if c filter = 0, then t ocslow defaults to 20 s. 5, 12 7, 18 fb2, fb1 power-good threshold input (undervoltage detect): fb1 and fb2 are internally compared to 1.235v and 0.80v references with 25mv of hyster- esis, respectively. external resistive divider networks may be used to set the voltage at these pins. if either fb input momentarily goes below its thresh- old, then /por is activated for one timing cycle, t por , indicating an output undervoltage condition. the /por signal deasserts one timing cycle after the fb pin exceeds its power-good threshold by 25mv. a 5 s filter on these pins prevents glitches from inadvertently activating the /por signal. 10 14 /fault circuit breaker fault status (output): active-low, weak pull-up to vcc1 or open-drain. asserted when the circuit breaker is tripped due to an overcurrent, undervoltage lockout, or overvoltage event. when deasserted, the mic2585 will initiate a new start cycle by toggling the on pin. 11 15 /por power-on reset (output): active low, weak pull-up to vcc1 or open drain. this pin remains asserted during start-up until a time period (t por ) after the lagging fb pin threshold (v fb1 or v fb2 ) is exceeded. the timing capacitor c por determines t por . when the output voltage monitored at either fb pin falls below v fb , /por is asserted for a minimum of one timing cycle (t por ). 4, 13 5, 20 out2, out1 output voltage monitor (inputs): for output tracking, connect these pins to their respective output to sense the output voltage. n/a 12 cdly output sequence delay timer (input): this pin is internally clamped to 6v. a capacitor connected to this pin sets a timer delay, t dly , between v out1 and v out2 as shown in figure 5. with this pin pulled up to vcc1 through a resistor, and if c gate1 = c gate2 , both v out1 and v out2 ramp up and down with the same dv/dt as depicted in the tracking mode diagram while maintaining a maximum voltage differential between v out1 and v out2 . n/a 9 trk discharge tracking mode pin (input): tie this pin to out1 or out2 to enable tracking during turn-off cycle. ground this pin to disable tracking during turn-off. the trk pin is not to be used as a digital input.
march 2005 5 mic2584/2585 mic2584/2585 micrel pin number pin number pin name pin function mic2584 mic2585 n/a 4, 21 ov2, ov1 overvoltage detect inputs: whenever the threshold voltage (v ov1 , v ov2 ) on either input is exceeded, the circuit-breaker is tripped while /fault is asserted and the gate1 and gate2 outputs are immediately brought low. n/a 6, 19 dis2, dis1 discharge outputs: when the on pin receives a logic low signal (deasserts), these pins provide a low impedance path to ground in order to allow the discharging of any load capacitance. the dis pins assert low if trk is less than 0.3v once on has been deasserted. the typical dis pin resistance varies between 50 ? to 170 ? dependent upon input supply voltage (see electrical table). an external resistor is required. see fast output discharge for capacitive load section in the applications informa- tion for more detail. n/a 16, 17 pg2, pg1 power-good outputs: active-high, weak pull-up to vcc1 or open-drain. these outputs are asserted whenever the fb1 and fb2 thresholds are exceeded and will not be asserted when fb1 and fb2 are below their thresholds.
mic2584/2585 micrel mic2584/2585 6 march 2005 absolute maximum ratings (note1) all voltages are referred to gnd) supply voltage (v cc1 /v cc2 ) .......................... 0.3v to 20v sense1/sense2 pins .............................. 0.3v to v cc1/2 trk, on, dis1, dis2, out1, out2, /por, /fault, pg1, pg2 pins .................. 0.3v to 15v gate1/gate2 pin ......................................... 0.3v to 25v all other input pins ........................................... -0.3v to 15v dis1/dis2 current .................................................... 25ma junction temperature ............................................... 125 c esd rating human body model ............................................... 1500v machine model ........................................................ 100v operating ratings (note 2) supply voltage v cc1 ......................................................................... 2.3v to 13.2v v cc2 ......................................................................... 1.0v to 13.2v operating temperature range .................. 40 c to +85 c package thermal resistance r ( ja) , 16-pin tssop ....................................... 99.1 c/w r ( ja) , 24-pin tssop ....................................... 83.8 c/w electrical characteristics (note 4) 2.3v v cc1 13.2v, 1.0v v cc2 13.2v, t a = 25 c unless otherwise noted. bold values indicate 40 c t a 85 c. symbol parameter condition min typ max units v cc1 supply voltage 2.3 13.2 v i cc1 supply current 1.7 3 ma v cc2 supply voltage v cc2 v cc1 1.0 13.2 v i cc2 supply current 0.05 0.15 ma v uv1 v cc1 undervoltage lockout 2.050 2.165 2.275 v threshold v uv1hys v cc1 undervoltage lockout 200 mv hysteresis v uv2 v cc2 undervoltage lockout 0.7 0.8 0.9 v threshold v uv2hys v cc2 undervoltage lockout 30 mv hysteresis v tripslow slow trip overcurrent threshold v ccx v sensex , v cc1 = v cc2 = 5v 42.5 50 57.5 mv v triphys slow trip overcurrent hysteresis 2.5 mv v tripfast fast trip overcurrent threshold x = j 90 100 110 mv v cc1 = v cc2 = 5v x = k 150 mv x = l 200 mv v gate external gate drive v gatex v ccx v cc1 or v cc2 > 5v 6 8 10 v (gate1 and gate2) v cc1 or v cc2 < 5v 3.5 4.5 8 v i gate gate pin pull-up current start cycle ?5 14 ? a i gateoff gate pin sink current /fault asserted 50 ma turn off (on deasserted) 30 45 70 a r dis discharge pin resistance on deasserted v ccx = 2.3v 170 ? trk < 0.3v v ccx = 5.0v 70 ? v ccx = 13.2v 50 ? i tmr overcurrent timer pin charge v ccx v sensex = 50mv ?.5 2.5 ?.5 a current overcurrent timer pin discharge v ccx v sensex = 25mv 1.5 2.5 3.5 a current v tmr overcurrent timer pin threshold 1.190 1.235 1.290 v
march 2005 7 mic2584/2585 mic2584/2585 micrel symbol parameter condition min typ max units i cpor power-on reset current v cc1 = 5v, c por = 0.5v charge current ?.5 2.5 ?.5 a sink current 2.5 v por power-on reset delay threshold start-up cycle 1.190 1.235 1.290 v v porhys power-on reset delay threshold 25 mv hysteresis v start start-up threshold start-up cycle 0.25 0.30 0.35 v v trk trk pin threshold on deasserted, i gate > 10 a 0.25 0.30 0.35 v (mic2585 only) v cc1 = v cc2 = 5v v trkoff trk pin turn-off voltage on asserted, v sense2 v out2 150 250 400 mv (mic2585 only) v cc1 = v cc2 = 5v v fb1 fb1 threshold 1.190 1.235 1.290 v v fb1hys fb1 threshold hysteresis 25 mv v fb2 fb2 threshold 0.75 0.80 0.85 v v fb2hys fb2 threshold hysteresis 25 mv v ov1 ov1 threshold 1.190 1.235 1.290 v (mic2585 only) v ov1hys ov1 threshold hysteresis 25 mv (mic2585 only) v ov2 ov2 threshold 0.75 0.80 0.85 v (mic2585 only) v ov2hys ov2 threshold hysteresis 25 mv (mic2585 only) i delay delay timer pin current v cc1 = v cc2 = 5v timer charge current ? 6 ? a (mic2585 only) timer discharge current 200 v delay delay timer pin threshold 1.190 1.235 1.290 v (mic2585 only) v dlyhys delay timer pin threshold 25 mv hysteresis (mic2585 only) v on on pin input threshold 1.190 1.235 1.290 v v onhys on pin hysteresis 25 mv i on on pin input current v on = v ccx 0.1 0.5 a v ol /fault , /por , pg1, pg2 output i out = 1.6ma, v cc1 = 5v 0.4 v low voltage (pg1 and pg2 for mic2585 only) i pullup /fault , /por , pg1, pg2 active on asserted, v fb1 > 1.25v, v fb2 > 0.8v 7 12 22 a output pull-up current /por = v cc1 1v (pg1 and pg2 for mic2585 only) v gatewin gate1 and gate2 on/off see timing diagram (figure 2) 100 250 mv voltage window (tracking enabled) note 3 ac parameters t ocfast fast overcurrent sense to gate v ccx v sensex = 100mv, c gate = 10nf 1 s low trip time see timing diagram (figure 3) t ocslow slow overcurrent sense to gate v ccx v sensex = 50mv, c filter = 0 20 s low trip time note 1. exceeding the absolute maximum rating may damage the device. note 2. the device is not guaranteed to function outside its operating rating. note 3. for the mic2584, v gatewin is specified only when on is asserted. note 4. specification for packaged product only.
mic2584/2585 micrel mic2584/2585 8 march 2005 timing diagrams on 100mv off vout1 - vout2 on pin asserted gate2 gate1 on pin deasserted vout1 - vout2 on off gate1 on gate2 on gate1 off gate2 on gate1 on gate2 off gate1 off gate2 off gate1 off gate2 on gate1 on gate2 off 100mv figure 2. gate voltage window ?tracking mode 0.5v 50mv v gatex t ocslow v tripfast (v ccx v sensex ) t ocfast 0.5v figure 3. current limit response on cpor t por t start v out[1,2] v pg[1/2] pg [1/2] /por v por v start figure 4. start-up cycle timing v out1 v out2 ? v<0.25v ? v<0.25v tracking mode, trk = v out1 or v out2 sequencing/tracking mode, trk = v out1 or v out2 (-1) - v out2 follows v out1 (-2) - v out1 follows v out2 v out1 , (-1) v out2 (-2) v out2 , (-1) v out1 (-2) ? v<0.25v v fb t dly figure 5. sequencing modes (mic2585 only)
march 2005 9 mic2584/2585 mic2584/2585 micrel typical characteristics 42 44 46 48 50 52 54 56 58 -40 -20 0 20 40 60 80 100 v tripslow1+ (mv) temperature ( c) v tripslow1+ vs. temperature v cc1 = 5.0v v cc1 = 13.2v v cc1 = 2.3v 42 44 46 48 50 52 54 56 58 -40 -20 0 20 40 60 80 100 v tripslow1 (mv) temperature ( c) v tripslow1 vs. temperature v cc1 = 5.0v v cc1 = 13.2v v cc1 = 2.3v 42 44 46 48 50 52 54 56 58 -40 -20 0 20 40 60 80 100 v tripslow2+ (mv) temperature ( c) v tripslow2+ vs. temperature v cc2 = 5.0v v cc2 = 13.2v v cc2 = 2.3v v cc2 = 1.0v 42 44 46 48 50 52 54 56 58 -40 -20 0 20 40 60 80 100 v tripslow2 (mv) temperature ( c) v tripslow2 vs. temperature v cc2 = 5.0v v cc2 = 13.2v v cc2 = 2.3v v cc2 = 1.0v 90 92 94 96 98 100 102 104 106 108 110 -40 -20 0 20 40 60 80 100 v tripfast1 (mv) temperature ( c) v tripfast1 vs. temperature v cc1 = 5.0v v cc1 = 13.2v v cc1 = 2.3v 90 92 94 96 98 100 102 104 106 108 110 -40 -20 0 20 40 60 80 100 v tripfast2 (mv) temperature ( c) v tripfast2 vs. temperature v cc2 = 5.0v v cc2 = 13.2v v cc2 = 2.3v 5 7.5 10 12.5 15 17.5 20 22.5 -40 -20 0 20 40 60 80 100 gate voltage_1 (v) temperature ( c) v gate1 vs. temperature v cc1 = 5.0v v cc1 = 13.2v v cc1 = 2.3v 5 7.5 10 12.5 15 17.5 20 22.5 -40 -20 0 20 40 60 80 100 gate voltage_2 (v) temperature ( c) v gate2 vs. temperature v cc2 = 5.0v v cc2 = 13.2v v cc2 = 2.3v 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 -40 -20 0 20 40 60 80 100 uvlo threshold (v) temperature ( c) uvlo1 and uvlo2 vs. temperature uvlo1+ uvlo1 uvlo2+ uvlo2 1.2 1.21 1.22 1.23 1.24 1.25 1.26 -40 -20 0 20 40 60 80 100 overcurrent timer (v) temperature ( c) overcurrent timer threshold vs. temperature v cc = 13.2v v cc = 5.0v v cc = 2.3v 0.27 0.28 0.29 0.3 0.31 0.32 -40 -20 0 20 40 60 80 100 cpor threshold1 (v) temperature ( c) cpor threshold1 (start-up) vs. temperature v cc1 = 13.2v v cc1 = 5.0v v cc1 = 2.3v 1.2 1.22 1.24 1.26 1.28 1.3 -40 -20 0 20 40 60 80 100 cpor threshold2 (v) temperature ( c) cpor threshold2 vs. temperature v cc2 = 13.2v v cc2 = 5.0v v cc2 = 2.3v
mic2584/2585 micrel mic2584/2585 10 march 2005 1.21 1.22 1.23 1.24 1.25 -40 -20 0 20 40 60 80 100 overvoltage1 (v) temperature ( c) overvoltage1 vs. temperature v cc1 = 13.2v v cc1 = 5.0v v cc1 = 2.3v 0.71 0.73 0.75 0.77 0.79 0.81 0.83 0.85 -40 -20 0 20 40 60 80 100 overvoltage2 (v) temperature ( c) overvoltage2 vs. temperature v cc2 = 13.2v v cc2 = 5.0v v cc2 = 2.3v 1.2 1.21 1.22 1.23 1.24 1.25 -40 -20 0 20 40 60 80 100 fb1 threshold (v) temperature ( c) fb1 threshold vs. temperature v cc1 =13.2v v cc1 =5.0v v cc1 =2.3v fb1+ fb1 v cc1 =13.2v v cc1 =5.0v v cc1 =2.3v 0.71 0.73 0.75 0.77 0.79 0.81 -40 -20 0 20 40 60 80 100 fb2 threshold (v) temperature ( c) fb2 threshold vs. temperature fb2+ fb2 v cc2 =13.2v v cc2 =2.3v v cc2 =5.0v v cc2 =13.2v v cc2 =2.3v v cc2 =5.0v 0 0.1 0.2 0.3 0.4 -40 -20 0 20 40 60 80 100 output low voltage (v) temperature ( c) output low voltage vs. temperature v cc = 2.3v v cc = 13.2v v cc = 5.0v 8 10 12 14 16 18 20 22 24 -40 -20 0 20 40 60 80 100 gate1 on current ( a) temperature ( c) gate1 on current vs. temperature v cc = 2.3v v cc = 13.2v v cc = 5.0v 2.2 2.3 2.4 2.5 2.6 2.7 2.8 -40 -20 0 20 40 60 80 100 overcurrent timer current ( a) temperature ( c) overcurrent timer discharge current vs. temperature v cc = 2.3v v cc = 13.2v v cc = 5.0v -2.1 -2.2 -2.3 -2.4 -2.5 -2.6 -2.7 -2.8 -2.9 -40 -20 0 20 40 60 80 100 overcurrent timer current ( a) temperature ( c) overcurrent timer charge current vs. temperature v cc = 2.3v v cc = 13.2v v cc = 5.0v 2.4 2.5 2.6 2.7 2.8 -40 -20 0 20 40 60 80 100 power on reset current ( a) temperature ( c) power on reset current vs. temperature v cc = 2.3v v cc = 13.2v v cc = 5.0v 2.4 2.5 2.6 2.7 2.8 -40 -20 0 20 40 60 80 100 active output pull-up current ( a) temperature ( c) active output pull-up current vs. temperature v cc = 2.3v v cc = 13.2v v cc = 5.0v 0 0.5 1 1.5 2 2.5 3 -40 -20 0 20 40 60 80 100 supply current_1 (ma) temperature ( c) supply current_1 vs. temperature v cc1 = 2.3v v cc1 = 13.2v v cc1 = 5.0v 20 30 40 50 60 70 80 90 100 110 120 -40 -20 0 20 40 60 80 100 supply current_2 ( a) temperature ( c) supply current_2 vs. temperature v cc2 = 2.3v v cc2 = 13.2v v cc2 = 5.0v
march 2005 11 mic2584/2585 mic2584/2585 micrel test circuit v outx + v outx mic2585 vccx gatex sensex on cdly cfilter cpor gnd irf7822 (so-8) i in v inx + v inx c dly (optional) c inx 4.7 f r1 r load c load r2 0.01 f 8200pf (not all pins shown for simplicity) 0.1 f outx fbx 33k ? i out r sensex 0.005 ? 12 34
mic2584/2585 micrel mic2584/2585 12 march 2005 functional characteristics turn-on (no delay) time (5ms/div.) on 5v/div v out1 v out2 2v/div /por 5v/div v cc1 = 5v v cc2 = 3.3v r l1 = 3.5 ? r l2 = 1 ? c l1 = c l2 = 220 f turn-on, staggered mode (mic2585-1bts) time (10ms/div.) on 2v/div v out1 v out2 2v/div /por 5v/div v cc1 = 5v v cc2 = 3.3v c dly = 47nf r l1 = r l2 = open on 5v/div /fault 5v/div v out2 1v/div i in2 1a/div v cc1 = 5v v cc2 = 3.3v r l2 =1 ? c l2 = 220 f turn-on (channel 2) time (5ms/div.) on 5v/div /fault 5v/div v out1 2v/div i in1 2a/div v cc1 = 5v v cc2 = 3.3v r l1 =1 ? c l1 = 220 f turn-on (channel 1) time (2.5ms/div.) on 2v/div v out1 v out2 2v/div /por 5v/div turn-off (tracking on) time (1ms/div.) v cc1 = 5v v cc2 = 3.3v r l1 = 1 ? r l2 = 3 ? c l1 = 2200 f c l2 = 220 f on 2v/div v out1 v out2 2v/div /por 5v/div v cc1 = 5v v cc2 = 3.3v r l1 = 1 ? r l2 = 3 ? c l1 = 2200 f c l2 = 220 f turn-off (tracking off) time (500 s/div.)
march 2005 13 mic2584/2585 mic2584/2585 micrel turn-on response (hot insert) time (5ms/div.) vcc1 2v/div fault 5v/div v out1 2v/div i in1 500ma/div v cc1 = 5v v cc2 = 3.3v c l = 250 f r l = 5 ? on 5v/div v out1 2v/div pg1 2v/div /por 2v/div 22.5ms power-on reset response time (5ms/div.) v cc1 = 5v v cc2 = 3.3v r l1 =3.5 ? c l1 = 220 f c por = 47nf fault 5v/div v out1 5v/div i in1 1a/div short-circuit crowbar channel 1 (scr enabled through a pnp from dis pin-mic2585-1bts) time (25 s/div.) v cc1 = 5v v cc2 = 3.3v r l1 = 3.5 ? r l2 = 1 ? c l1 = c l2 = 220 f 4.5a peak /fault 5v/div v out2 2v/div i in2 1a/div short-circuit crowbar channel 2 (scr enabled through a pnp from dis pin-mic2585-1bts) time (10 s/div.) v cc1 = 5v v cc2 = 3.3v r l1 = 3.5 ? r l2 = 1 ? c l1 = c l2 = 220 f 3.88a peak v out1 2v/div v gate1 10v/div fault 10v/div i in1 2a/div 6.04a peak v cc1 = 5v v cc2 = 3.3v r l1 = 1 ? r l2 = open c l1 = 2200 f c l2 = 220 f short-circuit response time (25 s/div.)
mic2584/2585 micrel mic2584/2585 14 march 2005 functional diagram v ref v ref 0.8v v ref i cpor v cc1 v cc1 i tmr 0.3v 0.3v 0.8v v ref v ref v ref glitch filter 100mv 2.5 a 2.5 a 100mv 50mv + 50mv mic2585-j uvlo2 0.8v uvlo1 2.165v up & down tracking charge pump 2 charge pump 1 gate1 gate2 21v out1 out2 dis1 dis2 /fault /por pg1 pg2 trk ov1 ov2 4 21 9 16 17 15 (11) 14 (10) 6 19 5 (4) 20 (13) 3 (3) 22 (14) sense1 23 (15) vcc1 24 (16) sense2 2 (2) vcc2 1 (1) cfilter 11 (8) gnd 13 (9) fb1 18 (12) fb2 7 (5) cdly 12 cpor 10 (7) on 8 (6) glitch filter 1.235v reference logic + + + + + + + + + + + + + + 2.5 a pin numbers for mic2584 are in parenthesis ( ) where applicable v cc1 20 a v cc1 20 a v cc1 20 a v cc1 20 a 21v 10v 10v
march 2005 15 mic2584/2585 mic2584/2585 micrel functional description hot swap insertion when circuit boards are inserted into live system backplanes and supply voltages, high inrush currents can result due to the charging of bulk capacitance that resides across the supply pins of the circuit board. this inrush current, although transient in nature, may be high enough to cause permanent damage to on-board components or may cause the system s supply voltages to go out of regulation during the transient period which may result in system failures. the mic2584 and mic2585 act as a controller for external n-channel mosfet devices in which the gate drive is controlled to provide inrush current limiting and output voltage slew rate control during hot swap insertions. power supply vcc1 is the main supply input to the mic2584/85 controller with a voltage range of 2.3v to 13.2v. the vcc2 supply input ranges from 1.0v to 13.2v and must be less than or equal to vcc1 for operation. both inputs can withstand transient spikes up to 20v. in order to ensure stability of the supplies, a minimum 1 f capacitor from each vcc to ground is recommended. alternatively, a low pass filter, shown in the typical application circuit, can be used to eliminate high frequency oscillations as well as help suppress transient spikes. also, due to the existence of undetermined parasitic induc- tance in the absence of bulk capacitance, placing a zener diode at each vcc of the controller to ground in order to provide external supply transient protection is strongly rec- ommended. see the typical application circuit in figure 1. start-up cycle supply contact delay during a hot insert of a pc board into a backplane or when the main supply (vcc1) is powered up from a cold start, as the voltage at the on pin rises above its threshold (1.235v typical), the mic2584/85 first checks that both supply volt- ages are above their respective uvlo thresholds. if so, then the device is enabled and an internal 2.5 a current source begins charging capacitor c por to 0.3v to initiate a start-up sequence. once the start-up delay (t start ) elapses, the cpor pin is pulled immediately to ground and a separate 14 a current source begins charging each gate output to drive the external mosfet that switches v in to v out . the programmed contact start-up delay is calculated using the following equation: tc v i 0.12 c ( f) start por start cpor por = ? (1) where the start-up delay timer threshold (v start ) is 0.3v, and the power-on reset timer current (i cpor ) is 2.5 a. see table 2 for some typical supply contact start-up delays using several standard value capacitors. as each gate voltage continues ramping toward its final value (v cc + v gs ) at a defined slew rate (see load capacitance/gate capacitance dominated start-up sections), a second cpor timing cycle begins if: 1)/fault is high and 2)cfilter is low (i.e., not an overvoltage, undervoltage lockout, or overcurrent state). this second timing cycle (t por ) begins when the lagging voltage exceeds its fb pin threshold (v fb ). see figure 4 in the " timing diagrams ". when the power supply is already present (i.e., not a hot swapping condition) and the mic2584/ 85 device is enabled by applying a logic high signal at the on pin, the gate outputs begin ramping immediately as the first cpor timing cycle is bypassed. active current regulation is employed to limit the inrush current transient response during start-up by regulating the load current at the programmed current limit value (see " current limiting and dual-level circuit breaker " section). the following equation is used to determine the nominal current limit value: i v r 50mv r lim tripslow sense sense == (2) where v tripslow is the current limit slow trip threshold found in the electrical table and r sense is the selected value that will set the desired current limit. there are two basic start-up modes for the mic2584/85: 1)start-up dominated by load capacitance and 2)start-up dominated by total gate capaci- tance. the magnitude of the inrush current delivered to the load will determine the dominant mode. if the inrush current is greater than the programmed current limit (i lim ), then load capacitance is dominant. otherwise, gate capacitance is dominant. the expected inrush current may be calculated using the following equation: inrush i c c 14 a c c gate load gate load gate ? ?? (3) where i gate is the gate pin pull-up current, c load is the load capacitance, and c gate is the total gate capacitance (c iss of the external mosfet and any external capacitor connected from the mic2584/85 gate pin to ground). load capacitance dominated start-up in this case, the load capacitance (c load ) is large enough to cause the inrush current to exceed the programmed current limit but is less than the fast-trip threshold (or the fast-trip threshold is disabled, m option). during start-up under this condition, the load current is regulated at the programmed current limit value (i lim ) and held constant until the output voltage rises to its final value. the output slew rate and equivalent gate voltage slew rate is computed by the following equation: output voltage slew rate dv /dt i c out lim load , = f, and i lim is set to 5a with a 12v input, then the load capacitance dominates as determined by the calculated inrush > i lim . therefore, the output voltage slew rate determined from equation 4 is: output voltage slew rate, (dv /dt) 5a 100 f v ms out = = 5
mic2584/2585 micrel mic2584/2585 16 march 2005 and the resulting t ocslow needed to achieve a 12v output is approximately 2.5ms. (see " power-on reset, overcurrent timer, and sequenced output delays " section to calculate t ocslow ). gate capacitance dominated start-up in this case, the value of the load capacitance relative to the gate capacitance is small enough such that during start-up the output current never exceeds the current limit threshold as determined by equation 3. the minimum value of c gate that will ensure that the current limit is never exceeded is given by the equation below: c (min) i i c gate gate limit load = where c gate is the summation of the mosfet input capaci- tance (c iss ) specification and the value of the capacitor connected to the gate pin of the mic2584/85 (and mosfet) to ground. once c gate is determined, use the following equation to determine the output slew rate dv out /dt for gate capacitance dominated start-up: dv /dt i c out gate gate = table 1 depicts the output slew rate for various values of c gate . i gate = 14 a c gate dv out /dt 0.001 f 14v/ms 0.01 f 1.4v/ms 0.1 f 0.14v/ms 1 f 0.014v/ms table 1. output slew rate selection for gate capacitance dominated start-up current limiting and dual-level circuit breaker many applications will require that the inrush and steady state supply current be limited at a specific value in order to protect critical components within the system. connecting a sense resistor between the vcc and sense pins of each channel sets the nominal current limit value for each channel of the mic2584/85 and the current limit is calculated using equation 2. the mic2584/85 also features a dual-level circuit breaker triggered via 50mv and 100mv current limit thresholds sensed across the vcc and sense pins. the first level of the circuit breaker functions as follows. for the mic2584/85, once the voltage sensed across these two pins exceeds 50mv on either channel, the overcurrent timer, its duration set by capacitor c filter , starts to ramp the voltage at cfilter using a 2.5 a constant current source. if the voltage at cfilter reaches the overcurrent timer threshold (v tmr ) of 1.235v, then cfilter immediately returns to ground as the circuit breaker trips and both gate outputs are immediately shut down. for the second level, if the voltage sensed across vcc and sense of either channel exceeds 100mv ( j option) at any time, the circuit breaker trips and both gate outputs shut down immediately, bypassing the overcurrent timer period. to disable current limit and circuit breaker operation, tie each channel s sense and vcc pins together and the cfilter pin to ground. output undervoltage detection the mic2584/85 employ output undervoltage detection by monitoring the output voltage through a resistive divider connected at the fb pins. during turn on, while the voltage at either fb pin is below its threshold (v fb ), the /por pin is asserted low. once both fb pin voltages cross their respec- tive threshold (v fb ), a 2.5 a current source charges capaci- tor c por . once the cpor pin voltage reaches 1.235v, the time period t por elapses as pin cpor is pulled to ground and the /por pin goes high. if the voltage at either fb drops below v fb for more than 10 s, the /por pin resets for at least one timing cycle defined by t por (see " applications informa- tion " for an example). input/output overvoltage protection the mic2585 monitors and detects overvoltage conditions in the event of excessive supply transients at the mic2585 input(s)/output(s). whenever the voltage threshold is ex- ceeded at either ov1 or ov2 of the mic2585, the circuit breaker is tripped and both gate outputs are immediately brought low. power-on reset, overcurrent timer, and sequenced output delays the power-on reset delay, t por , is the time period for the /por pin to go high once the lagging voltage exceeds the power-good threshold (v fb ) monitored at the fb pin. a capacitor connected to cpor sets the interval and is deter- mined by using equation 1 with v por substituted for v start . the resulting equation becomes: tc v i 0.5 c f por por por cpor por = ? () (7) where the power-on reset threshold (v por ) and timer current (i cpor ) are typically 1.235v and 2.5 a, respectively. for the mic2584/85, a capacitor connected to cfilter is used to set the timer which activates the circuit breaker during overcurrent conditions. when the voltage across either sense resistor exceeds the slow trip current limit threshold of 50mv, the overcurrent timer begins to charge for a period, t ocslow , determined by c filter . if t ocslow elapses, then the circuit breaker is activated and both gate outputs are immediately pulled to ground. the following equation is used to determine the overcurrent timer period, t ocslow . tc v i 0.5 c ( f) ocslow filter tmr tmr filter =? (8) where v tmr , the overcurrent timer threshold, is 1.235v and i tmr , the overcurrent timer current, is 2.5 a. if no capacitor for cfilter is used, then t ocslow defaults to 20 s.
march 2005 17 mic2584/2585 mic2584/2585 micrel the sequenced output feature is enabled for the mic2585 by placing a capacitor from cdly to ground. the 1 option allows for v out2 to follow v out1 and the 2 option allows for v out1 to follow v out2 during start-up (see " timing dia- grams, figure 5 "). the sequenced output delay time is determined using the following equation: tc v i 0.2 c ( f) dly dly delay delay dly ? ? (9) where v delay , the cdly pin threshold, is typically 1.235v, i delay , the cdly pin charge current, is typically 6 a, and c dly is the capacitor connected to cdly. tables 2, 3, and 4 provide a quick reference for several timer calculations using select standard value capacitors. undervoltage lockout internal circuitry keeps both gate output charge pumps off until vcc1 and vcc2 exceed 2.165v and 0.8v, respectively. c por t start t por 0.01 f 1.2ms 5ms 0.033 f 4ms 16.5ms 0.05 f 6ms 25ms 0.1 f 12ms 50ms 0.33 f 40ms 165ms 0.47 f 56ms 235ms 1 f 120ms 500ms table 2. selected power-on reset and start-up delays c filter t ocslow 220pf 110 s 680pf 340 s 1000pf 500 s 3300pf 1.6ms 0.01 f 5ms 0.047 f 23.5ms 0.1 f 50ms 0.33 f 165ms table 3. selected overcurrent timer delays c dly t dly 4700pf 950 s 0.01 f 2ms 0.047 f 9.5ms 0.1 f 20ms 0.33 f 66ms 0.82 f 165ms 1 f 200ms 2.2 f 440ms table 4. selected sequenced output delays
mic2584/2585 micrel mic2584/2585 18 march 2005 c6 0.1 f r1 47k ? sense1 vcc1 r sense1 0.007 ? 5% 1 34 24 23 sense2 vcc2 r sense2 0.015 ? 5% 12 34 12 c4 0.022 f **q2 si4922dy (1) (so-8) c load1 1500 f v out1 5v@5a v out2 1.8v@2a c load2 100 f c3 0.022 f **q1 si4922dy (2) (so-8) gnd 3 5 9 7 22 20 18 13 gate2 out2 trk out1 fb2 fb1 gate1 cdly 12 cfilter 11 on 8 undervoltage (out1) = 4.4v undervoltage (out2) = 1.5v circuit breaker response time = 5ms sequenced output delay = 20ms *diodes are bzx84c(x)v(x) **si4922dy is a dual power mosfet additional pins omitted for clarity c5 0.01 f c2 1 f r5 10.5k ? 1% r3 15.8k ? 1% r2 39.2k ? 1% r4 8.06k ? 1% *d1 (8v) *d2 (6v) c1 1 f mic2585-1 v in1 5v v in2 1.8v figure 6. output sequencing/tracking combination applications information output tracking and sequencing the mic2585 is equipped with optional supply settings: tracking or sequencing. there are many applica- tions that require two supplies to track one another within a specified maximum potential difference (or time) during power- up and power-down, such as in switching a processor on and off. in many other systems and applications, supply sequenc- ing during turn-on may be essential such as when a specific circuit block (e.g., a system clock) requires available power before another block of system circuitry. for either supply configuration, the mic2585 requires only one additional component and can be used as an integrated solution to traditional, and most often complex, discrete circuit solutions. additionally, the two optional supply settings may be com- bined to provide supply sequencing during start-up and supply tracking during turn-off (see figure 6 below). the mic2585 guarantees supply tracking within 250mv for power- up and power-down independent of the load capacitance of each supply. see " figure 2 " of the " timing diagrams ". wiring the trk pin to either out1 or out2 of the mic2585 enables the tracking feature. the out1 and out2 pins provide output track sensing and are wired directly to the output (source) of the external mosfet for channel 1 and channel 2, respectively. the mic2584/85 can also be used in systems that support more than two supplies. figure 7 illustrates the generic use of two separate controllers configured to support four inde- pendent supply rails with an associated output timing re- sponse. the pg (or /por) output of the first controller is used to enable the second controller. as configured, a fault condi- tion on either v out1 or v out2 will result in all channels being shut down. for systems with multiple power sequencing requirements, the controllers output tracking and sequenc- ing features can be implemented in order to meet the system s timing demands.
march 2005 19 mic2584/2585 mic2584/2585 micrel fast output discharge for capacitive loads in many applications where a switch controller is turned off by either removing the pcb from the backplane or the on pin is reset, capacitive loading will cause the output to retain voltage unless a bleed (low impedance) path is in place in order to discharge the capacitance. the mic2585 is equipped with an internal mosfet that allows the discharging of any load capacitance to ground through a 50 ? to 170 ? path. the discharge feature is configured by wiring the dis pin to the output (source) of the external mosfet and is enabled if the trk pin is below 0.3v after the controller has been disabled by a logic low signal received at the on pin of figure 1. see the " typical application " circuit of figure 1. a series resistor is required from dis to v out so that the maximum current of 25ma for the dis pin is not exceeded. output turn-off sequencing - no tracking there are many applications where it is necessary or desir- able for the supply rails to sequence during turn-on and turn- off, as is the case with some microprocessor requirements. the mic2585 can be configured to allow one output to shut off first, followed by the other output. figure 8 illustrates an example circuit that sequences out1 and out2 in a first on last off application. during start-up, capacitor c dly allows for v out1 to turn on followed by v out2 20ms later. once the on pin receives a low signal by removing the pcb from the backplane, or by an external processor signal, dis1 and dis2 will assert low. the external crowbar circuit connected from the dis2 pin will immediately bring v out2 to ground while v out1 will discharge to ground through the 750 ? (680 ? external, 70 ? internal) series path. mic2585 on /fault pg gate1 out1 gate2 out2 v out1 v in1 v in2 v in3 v in4 en v out2 mic2585 on /fault gate1 out1 gate2 out2 v out3 v out4 v out1 /v out2 short circuit on v out1 system timing v out3 /v out4 on pg /fault figure 7. supporting more than two supplies
mic2584/2585 micrel mic2584/2585 20 march 2005 2) next, determine r12 using the output good voltage of 10.5v and the following equation: vv r12 r13 r13 out1(good) fb1(max) = + () ? ? ? ? ? ? (10) using some basic algebra and simplifying equation 10 to isolate r12, yields: r12 r13 v v 1 out1(good) fb1(max) = ? ? ? ? ? ? ? ? ? ? ? ? ? ? (10.1) where v fb1(max) = 1.29v, v out1(good) = 10.5v, and r13 is 14.7k ? . substituting these values into equation 10.1 now yields r12 = 104.95k ? . a standard 105k ? 1% is selected. now, consider the 11.4v minimum output voltage, the lower tolerance for r13 and higher tolerance for r12, 14.55k ? and 106.05k ? , respectively. with only 11.4v available, the voltage sensed at the fb1 pin exceeds v fb1(max) , thus the /por and pg1 (mic2585) signals will transition from low to high, indicating power is good given the worse case tolerances of this example. a similar approach should be used for channel 2. output undervoltage detection for output undervoltage detection, the first consideration is to establish the output voltage level that indicates power is good. for this example, the output value for which a 12v supply will signal good is 10.5v. next, consider the toler- ances of the input supply and fb threshold (v fb ). for this example, given a 12v 5% supply for channel 1, the resulting output voltage may be as low as 11.4v and as high as 12.6v. additionally, the fb1 threshold has 50mv tolerance and may be as low as 1.19v and as high as 1.29v. thus, to determine the values of the resistive divider network (r12 and r13) at the fb1 pin, shown in the typical application circuit on page 1, use the following iterative design proce- dure. 1) choose r13 so as to limit the current through the divider to approximately 100 a or less. r13 v 100 a 1.29v 100 a 12.9k fb1(max) ? ? ?? . r13 is chosen as 14.7k ? 1%. c6 0.1 f r1 33k ? r2 47k ? sense1 vcc1 r sense1 0.012 ? 5% 12 34 24 23 sense2 vcc2 r sense2 0.012 ? 5% 12 34 12 c4 0.022 f q2 irf7822 (so-8) c load1 220 f v out1 5v@2.5a v out2 3.3v@2.5a c load2 220 f c3 0.022 f c7 0.033 f q4 tcr22-4 q3 ztx788a q1 irf7822 (so-8) gnd trk 3 5 6 7 22 20 18 13 9 gate2 out2 dis2 19 dis1 out1 fb2 fb1 gate1 cdly 12 cfilter 11 on 8 undervoltage (out1) = 4.4v undervoltage (out2) = 2.85v circuit breaker response time = 5ms sequenced output delay (turn-on) = 20ms *dual package diode is az23c8v2 resistors are 5% unless specified otherwise additional pins omitted for clarity c5 0.01 f c2 1 f r6 8.66k ? 1% r7 680 ? r8 1.5k ? r10 360 ? r9 3.6k ? r3 39.2k ? 1% r4 15.8k ? 1% r5 20.5k ? 1% *d1 (8v) *d2 (8v) c1 1 f mic2585-1 v in1 5v v in2 3.3v figure 8. first on last off application circuit
march 2005 21 mic2584/2585 mic2584/2585 micrel input overvoltage protection a similar design approach as the previous undervoltage detection example is recommended for the overvoltage protection circuitry, resistors r6 and r7 for ov1, in figure 1. for input overvoltage protection, the first consideration is to establish the input voltage level that indicates an overvoltage triggering a system (output voltage) shut down. for our example, the input value for which the channel 1 12v supply will signal an output shutdown is 13.2v (+10%). similarly, from the previous example: 1) choose r7 to satisfy 100 a condition. r7 v 100 a 1.19v 100 a 11.9k ov1(min) ? r7 is chosen as 13.0k ? 1% 2) thus, following the previous example and substituting r6 and r7 for r12 and r13, respectively, v ov1(min) for v fb1(max) , and 13.2v overvoltage for 10.5v output good, the same formula yields r6 of 131.2k ? . the nearest standard 1% value is 130k ? . now, consider the 12.6v maximum input voltage (v cc1 +5%), the higher tolerance for r7 and lower tolerance for r6, 13.13k ? and 128.7k ? , respectively. with 12.6v input, the voltage sensed at the ov1 pin is below v ov1(min) , and the mic2584/85 will not indicate an overvoltage condition until v cc1 exceeds approximately 13.2v considering the given tolerances. a similar approach should be used for channel 2. pcb connection sense there are several configuration options for the mic2584/85 s on pin to detect if the pcb has been fully seated in the backplane before initiating a start-up cycle. in figure 1, the mic2584/85 is mounted on the pcb with a resistive divider network connected to the on pin. r4 is connected to a short pin on the pcb edge connector. until the connectors mate, the on pin is held low which keeps the gate output charge pump off. once the connectors mate, the resistor network is pulled up to the input supply, 12v in this example, and the on pin voltage exceeds its threshold (v on ) of 1.235v and the mic2584/85 initiates a start-up cycle. in figure 9, the connec- tion sense consisting of a discrete logic-level mosfet and a few resistors allows for interrupt control from the processor or other signal controller to shut off the output of the mic2584/85. r4 pulls the gate of q2 to v in and the on pin is held low until the connectors are fully mated. once the connectors fully mate, a logic low at the /on_off signal turns q2 off and allows the on pin to pull up above its threshold and initiate a start-up cycle. applying a logic high at the /on_off signal will turn q2 on and short the on pin of the mic2584/85 to ground which turns off the gate output charge pump. gnd / on_off c3 0.033 f c4 0.01 f sense1 vcc1 on cpor out1 fb1 gate1 gnd /por cfilter /fault long pin backplane connector pcb edge connector long pin medium or short pin undervoltage (output) = 4.45v /por delay = 16.5ms start-up delay = 4ms circuit breaker response time = 5ms *q2 is tn0201t (sot-23) channel 2 and additional pins omitted for clarity. downstream signal short pin pcb connection sense q1 si7892dp (powerpak so-8) r5 10 ? r7 10.5k ? 1% r4 20k ? r1 33k ? r3 33 ? *q2 mic2584 c1 1 f c2 0.01 f c load1 1000 f r2 33k ? r6 27.4k ? 1% v out1 5v@7a v in1 5v /fault 11 9 7 8 16 15 12 13 6 10 14 r sense1 0.005 ? 5% 12 34 figure 9. pcb connection sense with on/off control
mic2584/2585 micrel mic2584/2585 22 march 2005 higher uvlo setting once a pcb is inserted into a backplane (power supply), the internal uvlo circuit of the mic2584/85 holds the gate output charge pump off until vcc1 exceeds 2.165v and vcc2 exceeds 0.8v. if vcc1 falls below 1.935v or vcc2 falls below 0.77v, the uvlo circuit pulls the gate output to ground and clears the overvoltage and/or current limit faults. for a higher uvlo threshold, the circuit in figure 10 can be used to delay the output mosfet from switching on until the desired input voltage is achieved. the circuit allows the charge pumps to remain off until v in1 exceeds 1 r1 r2 1.235v + ? ? ? ? ? ? provided that vcc2 has exceeded its threshold. both gate drive outputs will be shut down when v in1 falls below 1 r1 r2 1.21v + ? ? ? ? ? ? . in the example circuit , the rising uvlo threshold is set at approximately 9.0v and the falling uvlo threshold is established as 8.9v. the circuit consists of an external resistor divider at the on pin that keeps both gate output charge pumps off until the voltage at the on pin exceeds its threshold (v on ) and after the start- up timer elapses. hot swap power control for dsps in designing power supplies for dual supply logic devices, such as a dsp, consideration should be given to the system timing requirements of the core and i/o voltages for power- up and power-down operations. when power is provided to the core and i/o circuit blocks in an unpredictable manner, the effects can be detrimental to the life cycle of the dsp or logic device by allowing unexpected current to flow in the core and i/o isolation structures. additionally, bus contention is one of the critical system-level issues supporting the need for power supply sequencing. since the core supplies logic control for the bus, powering up the i/o before the core may result in both the dsp and an attached peripheral device being simultaneously configured as outputs. in this case, the output drivers of each device contend for control over sending data along the bus which may cause excessive current to flow in one of the paths (i 1 or i 2 ) shown in the bidirectional port of figure 11. upon powering down the system, the core voltage supply should turn off after the i/o as the bus control signal(s) may enter an indeterminate state if the core is powered down first. thus, for power sequencing of a dual supply voltage dsp implementing the mic2585 (if v core v i/o ), a circuit similar to figure 8 is recommended with the core voltage supplied through channel 1 and the i/o voltage supplied through channel 2. for systems with v core < v i/o , the mic2585-2 option with the i/o voltage through channel 1 and core through channel 2 is used to implement the first on-last off application. sense resistor selection the mic2584 and mic2585 use a low-value sense resistor to measure the current flowing through the mosfet switch (and therefore the load). this sense resistor is nominally set at 50mv/i load(cont) . to accommodate worst-case toler- ances for both the sense resistor (allow 3% over time and temperature for a resistor with 1% initial tolerance) and still supply the maximum required steady-state load current, a slightly more detailed calculation must be used. the current limit threshold voltage (i.e., the trip point ) for the mic2584/85 may be as low as 42.5mv, which would equate to a sense resistor value of 42.5mv/i load(cont) . carrying the numbers through for the case where the value of the sense resistor is 3% high yields: r 42.5mv 1.03 i 41.3mv i sense(max) load(cont) load(cont) = () () = (11) once the value of r sense has been chosen in this manner, it is good practice to check the maximum i load(cont) which the circuit may let through in the case of tolerance build-up in sense1 vcc1 on fb1 gate1 gnd undervoltage lockout threshold (rising) = 9.0v undervoltage lockout threshold (falling) = 8.9v undervoltage (output) = 11.4v channel 2 and additional pins omitted for clarity. q1 irf7822 (so-8) r3 10 ? r5 16.2k ? 1% r1 154k ? 1% r2 24.3k ? 1% mic2584 c1 1 f d1 (18v) c2 0.01 f c load1 1000 f r4 133k ? 1% v out1 12v@4a v in1 12v 9 16 15 12 6 14 r sense1 0.010 ? 5% 12 34 figure 10. higher uvlo setting
march 2005 23 mic2584/2585 mic2584/2585 micrel the opposite direction. here, the worst-case maximum cur- rent is found using a 57.5mv trip voltage and a sense resistor that is 3% low in value. the resulting equation is: i 57.5mv 0.97 r 59.3mv r load(cont,max) sense(nom) sense(nom) = () () = (12) as an example, if an output must carry a continuous 6a without nuisance trips occurring, equation 11 yields: r 41.3mv 6a m sense(max) ==? 688 . . the next lowest standard value is 6m ? . at the other set of tolerance extremes for the output in question, i 59.3mv 6.0m a load(cont,max) = ? = 988 . . knowing this final da- tum, we can determine the necessary wattage of the sense resistor using p = i 2 r, where i will be i load(cont, max) , and r will be (0.97)(r sense(nom) ). these numbers yield the following: p max = (9.88a) 2 (5.82m ? ) = 0.568w. in this ex- ample, a 1w sense resistor is sufficient. mosfet selection selecting the proper external mosfet for use with the mic2584/85 involves three straightforward tasks: choice of a mosfet which meets minimum voltage requirements. selection of a device to handle the maximum continuous current (steady-state thermal is- sues). verify the selected part s ability to withstand any peak currents (transient thermal issues). mosfet voltage requirements the first voltage requirement for the mosfet is easily stated: the drain-source breakdown voltage of the mosfet must be greater than v in(max) . for instance, a 12v input may reason- ably be expected to see high-frequency transients as high as 18v. therefore, the drain-source breakdown voltage of the mosfet must be at least 19v. for ample safety margin and standard availability, the closest minimum value will be 20v. the second breakdown voltage criterion that must be met is a bit subtler than simple drain-source breakdown voltage, but is not hard to meet. in mic2584/85 applications, the gate of the external mosfet is driven up to approximately 20v by the internal output mosfet (again, assuming 12v operation). at the same time, if the output of the external mosfet (its source) is suddenly subjected to a short, the gate-source voltage will go to (20v 0v) = 20v. this means that the external mosfet must be chosen to have a gate-source breakdown voltage of 20v or more, which is an available standard maximum value. however, if operation is above 12v, the 20v gate-source maximum will likely be exceeded. as a result, an external zener diode clamp should be used to prevent breakdown of the external mosfet when operating at voltages above 10v. a zener diode with 10v rating is recommended as shown in figure 12. at the present time, most power mosfets with a 20v gate-source voltage rating have a 30v drain-source break- down rating or higher. as a general tip, choose surface-mount devices with a drain-source rating of 30v as a starting point. finally, the external gate drive of the mic2584/85 requires a low-voltage logic level mosfet when operating at voltages lower than 3v. there are 2.5v logic level mosfets available. see table 5, " mosfet and sense resistor vendors " for suggested manufacturers. i 2 tx_/rx i 1 v dd v dd core supply (v cc ) output driver circuit block output driver circuit block data in oe data out external bus control i/o dual supply dsp peripheral core i/o supply (v dd ) data in oe data out figure 11. bidirectional port bus contention
mic2584/2585 micrel mic2584/2585 24 march 2005 mosfet steady-state thermal issues the selection of a mosfet to meet the maximum continuous current is a fairly straightforward exercise. first, arm yourself with the following data: the value of i load(cont, max.) for the output in question (see " sense resistor selection "). the manufacturer s data sheet for the candidate mosfet. the maximum ambient temperature in which the device will be required to operate. any knowledge you can get about the heat sinking available to the device (e.g., can heat be dissipated into the ground plane or power plane, if using a surface-mount part? is any airflow available?). the data sheet will almost always give a value of on resis- tance given for the mosfet at a gate-source voltage of 4.5v, and another value at a gate-source voltage of 10v. as a first approximation, add the two values together and divide by two to get the on-resistance of the part with 8v of enhancement. call this value r on . since a heavily enhanced mosfet acts as an ohmic (resistive) device, almost all that s required to determine steady-state power dissipation is to calculate i 2 r. the one addendum to this is that mosfets have a slight increase in r on with increasing die temperature. a good approximation for this value is 0.5% increase in r on per c rise in junction temperature above the point at which r on was initially specified by the manufacturer. for instance, if the selected mosfet has a calculated r on of 10m ? at a t j = 25 c, and the actual junction temperature ends up at 110 c, a good first cut at the operating value for r on would be: r on ? 10m ? [1 + (110 - 25)(0.005)] ? 14.3m ? the final step is to make sure that the heat sinking available to the mosfet is capable of dissipating at least as much power (rated in c/w) as that with which the mosfet s performance was specified by the manufacturer. here are a few practical tips: 1. the heat from a surface-mount device such as an so-8 mosfet flows almost entirely out of the drain leads. if the drain leads can be sol- dered down to one square inch or more, the copper will act as the heat sink for the part. this copper must be on the same layer of the board as the mosfet drain. 2. airflow works. even a few lfm (linear feet per minute) of air will cool a mosfet down sub- stantially. if you can, position the mosfet(s) near the inlet of a power supply s fan, or the outlet of a processor s cooling fan. 3. the best test of a surface-mount mosfet for an application (assuming the above tips show it to be a likely fit) is an empirical one. check the mosfet's temperature in the actual layout of the expected final circuit, at full operating current. the use of a thermocouple on the drain leads, or infrared pyrometer on the package, will then give a reasonable idea of the device s junction temperature. mosfet transient thermal issues having chosen a mosfet that will withstand the imposed voltage stresses, and the worse case continuous i 2 r power dissipation which it will see, it remains only to verify the mosfet s ability to handle short-term overload power dissi- pation without overheating. a mosfet can handle a much c3 0.05 f sense1 vcc1 on cpor fb1 gate1 gnd /por undervoltage (output) = 11.0v /por delay = 25ms start-up delay = 6ms *recommended for mosfets with gate-source breakdown of 20v or less for catastrophic output short circuit protection. (irf7822 v gs (max) = 12v) channel 2 and additional pins omitted for clarity. q1 irf7822 (so-8) r3 10 ? *d2 1n5240b 10v r5 13.3k ? 1% r1 33k ? r2 33k ? mic2584 c1 1 f c2 0.01 f c load1 220 f r4 100k ? 1% v out 12v@6a v in 12v 11 9 7 16 15 12 6 14 r sense1 0.006 ? 5% 12 34 downstream signal d1 (18v) figure 12. zener clamped mosfet gate
march 2005 25 mic2584/2585 mic2584/2585 micrel higher pulsed power without damage than its continuous dissipation ratings would imply. the reason for this is that, like everything else, thermal devices (silicon die, lead frames, etc.) have thermal inertia. in terms related directly to the specification and use of power mosfets, this is known as transient thermal impedance, or z (j-a) . almost all power mosfet data sheets give a transient thermal impedance curve. for example, take the following case: v in = 12v, t ocslow has been set to 100msec, i load(cont. max) is 1.2a, the slow-trip threshold is 50mv nominal, and the fast-trip threshold is 100mv. if the output is accidentally connected to a 6 ? load, the output current from the mosfet will be regulated to 1.2a for 100ms (t ocslow ) before the part trips. during that time, the dissipation in the mosfet is given by: p = e x i e mosfet = [12v-(1.2a)(6 ? )] = 4.8v p mosfet = (4.8v x 1.2a) = 5.76w for 100msec. at first glance, it would appear that a really hefty mosfet is required to withstand this sort of fault condition. this is where the transient thermal impedance curves become very useful. figure 13 shows the curve for the vishay (siliconix) si4410dy, a commonly used so-8 power mosfet. taking the simplest case first, we ll assume that once a fault event such as the one in question occurs, it will be a long time, 10 minutes or more, before the fault is isolated and the channel is reset. in such a case, we can approximate this as a single pulse event, that is to say, there s no significant duty cycle. then, reading up from the x-axis at the point where square wave pulse duration is equal to 0.1sec (=100msec), we see that the z (j-a) of this mosfet to a highly infrequent event of this duration is only 8% of its continuous r (j-a) . this particular part is specified as having an r (j-a) of 50 c/w for intervals of 10 seconds or less. thus: assume t a = 55 c maximum, 1 square inch of copper at the drain leads, no airflow. recalling from our previous approximation hint, the part has an r on of (0.0335/2) = 17m ? at 25 c. assume it has been carrying just about 1.2a for some time. when performing this calculation, be sure to use the highest anticipated ambient temperature (t a(max) ) in which the mosfet will be operating as the starting temperature, and find the operating junction temperature increase ( ? t j ) from that point. then, as shown next, the final junction temperature is found by adding t a(max) and ? t j . since this is not a closed- form equation, getting a close approximation may take one or two iterations, but it s not a hard calculation to perform, and tends to converge quickly. then the starting (steady-state)t j is: t j ? t a(max) + ? t j ? t a(max) + [r on + (t a(max) t a )(0.005/ c)(r on )] x i 2 x r (j-a) t j ? 55 c + [17m ? + (55 c-25 c)(0.005)(17m ? )] x (1.2a) 2 x (50 c/w) t j ? (55 c + (0.02815w)(50 c/w) ? 54.6 c iterate the calculation once to see if this value is within a few percent of the expected final value. for this iteration we will start with t j equal to the already calculated value of 54.6 c: t j ? t a + [17m ? + (54.6 c-25 c)(0.005)(17m ? )] x (1.2a) 2 x (50 c/w) t j ? ( 55 c + (0.02832w)(50 c/w) ? 56.42 c so our original approximation of 56.4 c was very close to the correct value. we will use t j = 56 c. finally, add (5.76w)(50 c/w)(0.08) = 23 c to the steady-state t j to get t j(transient max.) =79 c. this is an acceptable maximum junction temperature for this part. 2 1 0.1 0.01 10 4 10 3 10 2 10 1 11030 0.2 0.1 0.05 0.02 single pulse duty cycle = 0.5 1. duty cycle, d = 2. per unit base = r thja = 50 c/w 3. t jm t a = p dm z thja (t) t 1 t 2 t 1 t 2 notes: 4. surface mounted p dm normalized thermal transient impedance, junction-to-ambient normalized effective transient thermal impedance square wave pulse duration (sec) figure 13. transient thermal impedance
mic2584/2585 micrel mic2584/2585 26 march 2005 pcb layout considerations because of the low values of the sense resistors used with the mic2584/85 controllers, special attention to the layout must be used in order for the device s circuit breaker function to operate properly. specifically, the use of a 4-wire kelvin connection to accurately measure the voltage across r sense is highly recommended. kelvin sensing is simply a means of making sure that any voltage drops in the power traces connecting to the resistors does not get picked up by the traces themselves. additionally, these kelvin connections should be isolated from all other signal traces to avoid introducing noise onto these sensitive nodes. figure 14 illustrates a recommended, multi-layer layout for the r sense , power mosfet, timer(s), and feedback network connec- tions. the feedback network resistor values are selected for a 12v application. many hot swap applications will require load currents of several amperes. therefore, the power (v cc and return) trace widths (w) need to be wide enough to allow the current to flow while the rise in temperature for a given copper plate (e.g., 1oz. or 2oz.) is kept to a maximum of 10 c ~ 25 c. also, these traces should be as short as possible in order to minimize the ir drops between the input and the load. for a starting point, there are many trace width calculation tools available on the web such as the following link: http://www.aracnet.com/cgi-usr/gpatrick/trace.pl finally, the use of plated-through vias will be needed to make circuit connections to power and ground planes when utilizing multi-layer pc boards. via to gnd plane mic2584 vcc1 sense1 gate1 fb1 s s s g d d d d **c gate via to gnd plane **r gate 93.1k 1% 12.4k 1% *power mosfet (so-8) *sense resistor (2512) w current flow to the load current flow from the load current flow to the load drawing is not to scale similar considerations should be used for channel 2. *see table 5 for part numbers and vendors. **optional components. trace width (w) guidelines given in "pcb layout recommendations" section of the datasheet. out1 /por /fault gnd w w 9 10 11 12 16 15 14 13 figure 14. recommended pcb layout for sense resistor, power mosfet and feedback network
march 2005 27 mic2584/2585 mic2584/2585 micrel mosfet and sense resistor vendors device types and manufacturer contact information for power mosfets and sense resistors is provided in table 5. some of the recommended mosfets include a metal heat sink on the bottom side of the package that is connected to the drain leads. the recommended trace for the mosfet gate of figure 14 must be redirected when using mosfets pack- aged in this style. contact the device manufacturer for package information. mosfet vendors key mosfet type(s) *applications contact information vishay (siliconix) si4420dy (so-8 package) i out 10a www.siliconix.com si4442dy (so-8 package) i out = 10a-15a, v cc 5v (203) 452-5664 si3442dv (so-8 package) i out 3a, v cc 5v si7860dp (powerpak so-8) i out 12a si7892dp (powerpak so-8) i out 15a si7884dp (powerpak so-8) i out 15a sub60n06-18 (to-263) i out 20a, v cc 5v sub70n04-10 (to-263) i out 20a, v cc 5v international rectifier irf7413 (so-8 package) i out 10a www.irf.com irf7457 (so-8 package) i out 10a (310) 322-3331 irf7822 (so-8 package) i out = 10a-15a, v cc 5v irlba1304 (super220 )i out 20a, v cc 5v fairchild semiconductor fds6680a (so-8 package) i out 10a www.fairchildsemi.com fds6690a (so-8 package) i out 10a, v cc 5v (207) 775-8100 philips ph3230 (sot669-lfpak) i out 20a www.philips.com hitachi hat2099h (lfpak) i out 20a www.halsp.hitachi.com (408) 433-1990 * these devices are not limited to these conditions in many cases, but these conditions are provided as a helpful reference for customer applications. resistor vendors sense resistors contact information vishay (dale) wsl series www.vishay.com/docswsl_30100.pdf (203) 452-5664 irc oars series www.irctt.com/pdf_files/oars.pdf lr series www.irctt.com/pdf_files/lrc.pdf (second source to wsl ) (828) 264-8861 table 5. mosfet and sense resistor vendors
mic2584/2585 micrel mic2584/2585 28 march 2005 package information rev. 01 16-pin tssop (ts) 1.10 max (0.043) 0.15 (0.006) 0.05 (0.002) 1.00 (0.039) ref 8 0 6.4 bsc (0.252) 7.90 (0.311) 7.70 (0.303) 0.30 (0.012) 0.19 (0.007) 0.20 (0.008) 0.09 (0.003) 0.70 (0.028) 0.50 (0.020) dimensions: mm (inch) 4.50 (0.177) 4.30 (0.169) 0.65 bsc (0.026) 24-pin tssop (ts) micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel + 1 (408) 944-0800 fax + 1 (408) 474-1000 web http://www.micrel.com the information furnished by micrel in this datasheet is believed to be accurate and reliable. however, no responsibility is as sumed by micrel for its use. micrel reserves the right to change circuitry and specifications at any time without notification to the customer. micrel products are not designed or authorized for use as components in life support appliances, devices or systems where malfu nction of a product can reasonably be expected to result in personal injury. life support devices or systems are devices or systems that (a) are intend ed for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant inj ury to the user. a purchaser s use or sale of micrel products for use in life support appliances, devices or systems is at purchaser s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 2005 micrel, incorporated.

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